GE IC610CPU104A Series Six CPU Module

The GE IC610CPU104A, also cataloged as the IC610CPU104 CPU Module, operates as a dedicated hardware component for discrete and analog logic instruction execution within GE Series Six PLC platforms. It manages up to 2048 discrete input and output points alongside 128 analog channels while communicating via an integrated RS-232 serial programming port.

Hardware Specifications

Backplane Bus Communication Velocity and Firmware Compatibility

The GE IC610CPU104A utilizes high-speed backplane bus communication velocity to deliver deterministic scan execution rates of 1.0 ms per 1k word of user logic across connected Series Six chassis racks. The module interfaces with the primary backplane power distribution system, drawing a maximum continuous current load of 1.5 A at 5 VDC. Onboard instruction processing circuits maintain total firmware flash compatibility with relay ladder logic structures executed via Logicmaster Six programming tools. Internal power circuitry leverages a 1000 uF hold-up capacitor coupled with a lithium backup cell to preserve program execution state and memory retention during backplane power switching transitions.

Frequently Asked Questions

Q: How long can the CPU retain program memory during an active battery replacement?

A: An onboard 1000 uF energy storage capacitor maintains CMOS RAM contents for up to 30 seconds after disconnecting the BR-2/3A lithium battery, allowing hot replacement of the cell without loss of user memory.

Q: Can the IC610CPU104A module be inserted or removed while the rack backplane is energized?

A: No. Hot-swapping is strictly prohibited. The main power supply to the Series Six backplane rack must be de-energized prior to inserting or removing the CPU unit to prevent backplane bus transients and connector degradation.

Q: What prevents accidental modification or overwriting of the 8k word RAM logic program?

A: Program alteration is restricted hardware-wise via a physical memory protect jumper located on the CPU module board, which must be configured to inhibit write access to the CMOS RAM.

Field Installation Guidelines

1. De-energize and isolate all electrical power sources supplying the Series Six processor chassis before starting installation.
2. Align the IC610CPU104A circuit board guides with the dedicated central processing slot rails in the main rack.
3. Push the module firmly into the chassis slot until the rear backplane edge connectors mate fully with the backplane bus socket.
4. Engage top and bottom mechanical locking levers to clamp the module frame securely against chassis operational vibration.
5. Verify the hardware memory protect jumper orientation prior to applying power.
6. Connect the 25-pin D-sub serial interface cable from the programming device to the front RS-232 port, routing communication wires away from high-voltage field wiring.